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| author | Dwayne Boone <dwayne@zeroc.com> | 2006-04-03 12:25:29 +0000 |
|---|---|---|
| committer | Dwayne Boone <dwayne@zeroc.com> | 2006-04-03 12:25:29 +0000 |
| commit | 81a3df50a228c5ae23d493efddb839cb10bb077c (patch) | |
| tree | b4ff9224973be742c94cb538ab3621cf30ddbf77 /cpp/include/IceUtil/Config.h | |
| parent | Fixed bug 921 - added MIPS support (diff) | |
| download | ice-81a3df50a228c5ae23d493efddb839cb10bb077c.tar.bz2 ice-81a3df50a228c5ae23d493efddb839cb10bb077c.tar.xz ice-81a3df50a228c5ae23d493efddb839cb10bb077c.zip | |
Fixed bug 921 - Added MIPS support
Diffstat (limited to 'cpp/include/IceUtil/Config.h')
| -rw-r--r-- | cpp/include/IceUtil/Config.h | 10 |
1 files changed, 5 insertions, 5 deletions
diff --git a/cpp/include/IceUtil/Config.h b/cpp/include/IceUtil/Config.h index 50f5a2e2afc..3381104d864 100644 --- a/cpp/include/IceUtil/Config.h +++ b/cpp/include/IceUtil/Config.h @@ -16,12 +16,12 @@ // Most CPUs support only one endianness, with the notable exceptions // of Itanium (IA64) and MIPS. // -#if defined(__i386) || defined(_M_IX86) || \ - defined(__x86_64) || defined(_M_X64) || \ - defined(_M_IA64) || defined(__alpha__) +#if defined(__i386) || defined(_M_IX86) || defined(__x86_64) || \ + defined(_M_X64) || defined(_M_IA64) || defined(__alpha__) || \ + defined(__MIPSEL__) # define ICE_LITTLE_ENDIAN -#elif defined(__sparc) || defined(__sparc__) || defined(__hppa) || \ - defined(__ppc__) || defined(_ARCH_COM) +#elif defined(__sparc) || defined(__sparc__) || defined(__hppa) || \ + defined(__ppc__) || defined(_ARCH_COM) || defined(__MIPSEB__) # define ICE_BIG_ENDIAN #else # error "Unknown architecture" |